Quantity description of numbered peripherals
1 FPGA chip 1 XC6SLX16-2FTG256C (FBGA256), Speed Grade 2, Logic Elements 14579, Memory Bits 576Kb, Embedded Multipliers 16, 2
2 SDRAM 1 a piece of 16M x 16Bit SDRAM, the highest 166MHz read and write speed 256Mb, super large capacity, independent I/O control, independent data address bus.
3 serial configuration FLASH 1 marking M25P16 (16Mbit), burning and writing firmware or embedded programs as well as user data.
4 QSPI FLASH 1. A 128Mbit size Quad-SPI FLASH chip is used to store user data or files. The chip is W25Q128. and a 128Mbit size Quad-SPI FLASH chip is used to store user data or files.
5 EEPROM 1 a piece of EEPROM, the model is 24LC04, the capacity is: 4Kbit (2*256*8bit).
6 TF/SD card 1 provides a standard TF card slot, support FAT16, FAT32 data storage format
7 USB to serial port 1 through the PL2302 USB to the serial port chip, the user can use a USB line to connect it to the USB port of the upper PC for serial data communication
8 USB2.0 1 realizes high-speed data communication between PC and FPGA through Cypress CY7C68013A USB2.0 controller chip, supporting low speed (12Mbit/s) and full speed (480Mbit/s) mode. And provide independent reset button, and firmware independent shield jump line, convenient for users to develop the USB2.0 interface independently
10 clock 1 an active clock 50M, the user can replace the other frequency, can also use the USB2.0 chip 68013 IFCLK, CLKOUT to do the clock use
11 real time clock 1 real-time clock chip RTC, model DS1302, its function is to provide in 2099 calendar, the date when the minutes and seconds and weeks. And the battery interface is reserved, and the standard notebook battery can be used for a long time clock.
14 key switch 5 with a pull up potential, the user key input.
15 power 3 5V, 3.3V/2A, 1.2V/800MA independently elicited convenient user use and test
16 JTAG port 1 debug FPGA online, solidify user programs and firmware. Standard 2*7 14PIN 2.0MM spacing socket
17 LVDS 8 leads to independent 8 pairs of LVDS in J6 BANK0, and can select different level standards by adjusting BANK0 voltage, independent LDO power supply chip and default 3.3V IO level.
18 LED 64 independent IO interface LEDS, users can define themselves, 2 RXD/TXT state instructions
19 system main reset 1 system reset button, with up pull. Can also be used as the user key input.
20 PCB wiring high speed 4 layer PCB wiring, senior engineer hand wiring, and carry out equal length EMC simulation analysis, so as to ensure the system high speed operation. Size: (85mm X 82mm)
21 PMOD interface 1 XILINX PMOD standard interface, equal length wiring and do EMC simulation analysis. A variety of PMOD modules can be connected directly to XILINX
21 extended I/O 3 extended IO interface for sampling and equal length wiring, and carried out high speed EMC simulation analysis to ensure the interface high-speed connection of external equipment. (J6) 38+ (J7) 38+ (J1) 8=84 (elicited independent I/O). Among them, J6, J7 two extended IO can be interchangeable and compatible with our various extension modules, J1 is the XILINX PMOD standard interface. A variety of PMOD modules can be connected directly to XILINX